Design a memory tester that verifies the correct operation of a 6116 static RAM (Figure 8-15).The tester should store a checkerboard pattern (alternating 0's and 1's in the even addresses, and alternating 1's and 0's in the odd addresses) in all memory locations and then read it back. The tester should then repeat the test using the reverse pattern.
(a) Draw a block diagram of the memory tester. Show and explain all control signals.
(b) Draw an SM chart or state graph for the control unit. Use a simple RAM model and disregard timing.
(c) Write VHDL code for the tester and use a test bench to verify its operation.
