This problem concerns the design of a circuit to find the square of a floating-point number, F × 2E. F is a normalized 5-bit fraction, and E is a 5-bit integer; negative numbers are represented in 2's complement. The result should be properly normalized. Take advantage of the fact that (-F)2 = F2.
(a) Draw a block diagram of the circuit. (Use only one adder and one complementer.)
(b) State your procedure, taking all special cases into account. Illustrate your procedure for
(c) Draw an SM chart for the main controller. You may assume that multiplication is carried out using a separate control circuit, which outputs Mdone = 1 when multiplication is complete.
(d) Write a VHDL description of the system.