Draw a two-input xor circuit using only and or and not gates


Assignment

1. Draw a 2-input XOR circuit using only AND, OR, and NOT gates:

2. Describe the functionality of each Y86 pipeline stage during execution of the andl rA, rB instruction in terms of the icode, ifun, rA, rB, valA, valB, valC, valP, valE, valM, srcA, srcB, dstE, dstM, cnd signals (you may also use M, R, and PC):

IF:
ID:
EX:
MEM:
WB+PC:

3. Briefly describe why the stall penalty for a pipelined Y86 ret instruction is 3 cycles:

4. Consider the following C procedure:

void swap(int *xp, int *yp) {
int t0 = *xp;
int t1 = *yp;
*xp = t1;
*yp = t0;
}

Write Y86 code that implements the above C procedure. Comment your code:

5. Consider the following C function:

int f(int *a, int *dest, int prod) {
*dest = prod ? 1 : 0;
for (int i = 0; i < len(a); ++i) {
if (prod) {
*dest *= a[i];
} else {
*dest += a[i];
}
}
}

Rewrite the above C function to minimize unnecessary function calls, memory writes, and if statements:

6. Consider the following Y86 code:

mrmovl 0(%eax) %ecx
mrmovl 0(%ebx) %edx
addl %ecx %ecx
xorl %ecx %edx

a. How many pipeline stalls are required when running the above code without data forwarding? Why? Draw a pipeline diagram to support your answer:

b. How many pipeline stalls are required when running the above code with data forwarding? Why? Draw a pipeline diagram to support your answer:

7. Consider a 32-byte direct-mapped cache with 8-byte blocks for an 8-bit machine (256 bytes of memory):

a. Write a C function unsigned char getOffset(unsigned char address) that returns the cache offset for the specified address using bitwise operators (assuming the cache parameters above):

b. Write a C function unsigned char getSet(unsigned char address) that returns the cache set for the specified address using bitwise operators (assuming the cache parameters above):

c. If the following addresses are accessed in sequence, which addresses will result in cache hits and which will result in misses (assuming the cache parameters above and that the cache is initially empty)? For each address, show the tag, set, offset, and whether it resulted in hit or miss:

0x02
0x04
0x8
0x26
0x04
0x24

Format your assignment according to the following formatting requirements:

1. The answer should be typed, double spaced, using Times New Roman font (size 12), with one-inch margins on all sides.

2. The response also include a cover page containing the title of the assignment, the student's name, the course title, and the date. The cover page is not included in the required page length.

3. Also Include a reference page. The Citations and references should follow APA format. The reference page is not included in the required page length.

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Computer Engineering: Draw a two-input xor circuit using only and or and not gates
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