Develop a state diagram for a sequential circuit that has two input terminals (W and X) and two output terminals (Y and Z). When three consequtive 1's are detected on W, Y will become 1. When 4 consequtive 1's are detected on W, Z will become 1. When three or more consecutive 1s are detected on X then both Y and Z will become 1s. For all other input combinations both Y and Z will be zeros. W and X will never receive 1s at the same time. Use state reduction where necessary to reduce.