Refer to the logic diagram in Fig. 5.66. Determine the current being sourced by the NAND gate when its output is HIGH and also the current sunk by it when its output is LOW, given that IIH (AND gate) = 0.02 mA, IIL (AND gate) = 0.4 mA, IIH (OR gate) = 0.04 mA, IIL (OR gate) = 1.6 mA, IOH(NAND gate) = 1.0 mA, IOL(NAND gate) = 20.0 mA.
HIGH-state current=0.08 mA; LOW-state current=2.0 mA
