Design an even parity generator for a 3-bit word. Thiscircuit will have three inputs(the 3 bits of the word) and oneoutput. This output should be 1 if there is an odd number of1s in the input word; otherwise, the output should be 0 (if thereis an even number of 1s in the input word). Produce a designusing gate equivalency rules containing:
A)A truth table defining the function as previouslydescribed.
B)A SOP equation for the truth table.
C)A POS equation for the truth table.
D)A logic diagram to implement the SOP equation using NANDgates only.(Show AND and OR forms.)
E)A logic diagram to implement the POS equation using NANDgates only.