Problem
Design a simple, single-channel DMA controller for the 68000 using SSI and MSI logic. The DMAC has a two-wire interface to the peripheral, consisting of REQ* and ACK*, When REQ* is asserted by a peripheral, the DMAC requests the bus by using its bus arbitration control lines, BR*, BG*, and BGACK*. The DMAC executes a single cycle of DMA at a time. When the transfer is complete, the DMAC asserts ACK* to indicate that it is ready for the next transfer.
The response should include a reference list. Double-space, using Times New Roman 12 pnt font, one-inch margins, and APA style of writing and citations.