Design a circuit whose output goes high when its inputs are

Question

Task:

a) Boolean Expression:

OUTPUT, Y = AB'(C⊕D) = AB'C'D + AB'CD' + AB'CD

b) Boolean Expression in SOP form:

OUTPUT, Y= AB'C'D + AB'CD'

c) Simulation: (and Opportunity of Distinction part A)

Circuit Diagram:

d) Truth Table:

INPUTS				OUTPUT
A	B	C	D	Y
0	0	0	0	0
0	0	0	1	0
0	0	1	0	0
0	0	1	1	0
0	1	0	0	0
0	1	0	1	0
0	1	1	0	0
0	1	1	1	0
1	0	0	0	0
1	0	0	1	1
1	0	1	0	1
1	0	1	1	0
1	1	0	0	0
1	1	0	1	0
1	1	1	0	0
1	1	1	1	0

e) CIRCUIT OPERATION: (Opportunity of Distinction)

According to the output expression generated two 4-input AND gates are connected to generate AB'C'D and AB'CD'. After that for sum of these two OR gate is used and form a combination of AB'C'D + AB'CD'.

Finally output is shown by logic analyzer, where each inputs and output are shown in one figure but in different line. In CRO all inputs and output are shown in same line.

TASK 2:

Design a circuit whose output goes HIGH when its inputs are: A is high and B is low and either input C or input D is also HIGH.

Procedure:

a) Derive a Boolean that describes the performance of the required circuit.

b) Rearrange the expression in Sum-of-Products (SOP) form.

c) Using simulation software, Draw the circuit diagram and simulate its operation.

d) Produce a four-variable truth table and apply all combinations of input variables to the circuit and each time note the logical state.

e) Demonstrate the circuit operation to your tutor.

A	B	C	D	F
0	0	0	0
0	0	0	1
0	0	1	0
0	0	1	1
0	1	0	0
0	1	0	1
0	1	1	0
0	1	1	1
1	0	0	0
1	0	0	1
1	0	1	0
1	0	1	1
1	1	0	0
1	1	0	1
1	1	1	0
1	1	1	1

Opportunity for Distinction (Part A) (Both Part A and Part B must be completed for D2) Demonstrate, with photographic evidence, that you have simulated the circuit in Task 2 without an y help our peers and/or tutor.

Opportunity for Merit

Use Karnaugh Maps to check the SOP found in Part b, is equivalent to the original Boolean expression, found in Part a.