1) Design a BJT differential pair amplifier (balanced in, unbalanced out) that provides 20 dB differential gain and 40 dB CMRR. Assume b = 100, ro = 50 KW. Use dual dc power supplies +Vcc and -Vee.
2) ??????????????????A BJT differential amplifier is biased to have 500uA dc current in each device,b = 100, RC1 = RC2 = 1KW, and RE = 3KW. Assume ro = ¥. When operating in balanced in, balanced out mode what is the maximum allowable resistor tolerance (e.g.±N%) in order to have CMRR greater than or equal to 40 dB?