Design a 8x1 multiplexer using seven 2x1 multiplexers


Q1. Design a 8x1 multiplexer using seven 2x1 multiplexers. Please label all signals clearly.

Q2. The question considers the design of a 8x1 multiplexer using gates. Assume the data inputs are I0,...,I7 and the select inputs are S2, S1 and S0.

(part a) Write a sum-of-products expression for the 8x1 multiplexer.

(part b) Implement the expression in part (a) using NOT and NAND gates with any number of inputs. Please use as few gates as possible.

Q3. Consider a function F with 4 bits of input A3,A2,A1,A0 such that the output of F is 1 if the unsigned binary number represented by A3A2A1A0 is a prime (i.e., 2, 3, 5, 7, 11 or 13). Otherwise, the output of F is 0.

(Part a) Write the truth table for F.

(Part b) Implement F using a 16x1 MUX and nothing else.

(Part c) Implement F using a 8x1 MUX, some AND gates, some OR gates, and some NOT gates.

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Electrical Engineering: Design a 8x1 multiplexer using seven 2x1 multiplexers
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