1. Design a 4-bit register with 2 control inputs s1 and s0; 4 data inputs I3, I2, I1, and I0; and 4 data outputs Q3, Q2, Q1, and Q0. When s1s0=00, the register maintains its value. When s1s0=01, the register loads I3....I0. When s1s0=10, the register clears itself to 0000. When s1s0=11, the register complements itself, so for example, 0000 would become 1111, and 1010 would become 0101.
2. Design an adder that computes the sum of four 8-bit numbers, using 8-bit carry ripple adders. Use a basic 8-bit carry-ripple adder as a building block for the design.
3. Use a magnitude comparator and logic to design a circuit that outputs 1 when a 4-bit input ‘a' is between 8 and 14, inclusive.
4. Design a 4-bit down counter using D flip-flops.
5. Optimize the function F 1 (a,b,c,d) = fm (0,1,3,4,7,10,11,12,14) using tabular method. Verify your answer with K-Map optimization? Show all your steps.
6. Optimize the function F 2 (a,b,c,d) fm (1,2,4,7,8,9,10,11,13) using tabular method. Verify your answer with K-Map optimization? Show all your steps.
7. Optimize the function F 3 (a,b,c,d) fm( 1,4,8,9,11,12,13,15) + d( 0,2,3,7) using tabular method. Verify your answer with K-Map optimization? Show all your steps.