Define the operation of real mode interrupt.
Operation of Real mode interrupt: While the microprocessor completes executing the current instruction, this determines whether an interrupt is active through checking
1. Instruction execution,
2. Single -step,
3. NMI,
4. Co-processor segment overrun,
5. INTR, and
6. INT instruction in the order presented.
When one or more of these interrupt conditions are present, illustrates sequence of events occurs:
1. The flag register contents are pushed on the stack
2. Both the trap (TF) and interrupt (IF) flags are cleared. It disables the INTR pin and the trap or single-step feature.
3. The code segment register (CS) contents are pushed on the stack.
4. The instruction pointer (IP) contents are pushed on the stack.
5. The interrupt vector contents are fetched furthermore placed in both IP and CS therefore the next instruction executes at the interrupt service procedure addressed through the vector.