Consider a stop-and-wait data link control protocol each


Question: Consider a stop-and-wait data link control protocol. Each transmitted frame contains the sequence number, modulo 2, of the contained packet. When a frame arrives at the receiver, the sequence number of the packet is compared with the packet number awaited by the receiver: if the numbers are the same modulo 2 and the CRC is satisfied, the packet is accepted and the awaited packet number is incremented. An ack containing the new awaited packet number modulo 2 is sent back to the transmitter. If a frame is received with correct CRC but the wrong sequence number, an ack (containing the awaited packet number modulo 2) is also sent back to the transmitter.

The new twist here is that frames can go out of order on the channel. More precisely, there is a known maximum delay T on the channel. If a packet is transmitted at some time t. it is either not received at all or is received at an arbitrary time in the interval from t to t + T. independently of other transmissions. The return channel for the acks behaves the same way with the same maximum delay T. Assume that the receiver sends acks instantaneously upon receiving packets with valid CRCs.

(a) Describe rules for the transmitter to follow so as to ensure that each packet is eventually accepted, once and in order, by the receiver. You are not to put any extra protocol information in the packets nor to change the receiver's operation. You should try to leave as much freedom as possible to the transmitter's operation subject to the restriction of correct operation.

(b) Explain why it is impossible to achieve correct operation if there is no bound on delay.

Request for Solution File

Ask an Expert for Answer!!
Electrical Engineering: Consider a stop-and-wait data link control protocol each
Reference No:- TGS02261741

Expected delivery within 24 Hours