(Multi-Bit Adders) Figure 5.18 shows how to use 4-bit adders and a 4-bit carry lookahead unit to implement a fast 16-bit adder. Using these as primitive building blocks, show how to construct 32- and 64-bit adders with carry lookahead.
(a) Draw block diagrams for the 32- and 64-bit adders, showing all interconnections.
(b) Analyze the worst-case gate delays encountered in 32- and 64-bit addition. Use the simple delay models as in Section 5.6.
