1) Describe various sources of power dissipation in digital CMOS circuit
2) Describe:
i. Sub threshold Swing
ii. Effects of short channel length
3) Describe:
i. Average power estimation in combinational circuits
ii. Average power estimation in sequential circuits.
4)a) Describe the algorithmic level transforms for low power.
b) With suitable example, describe the drawback of power reduction using parallelism.
5) Describe:
i. Technology mapping
ii. Transistor sizing
6) Draw and describe the operation of 4T SRAM cell and 6T SRAM cell
7) Describe various precharge techniques employed by SRAM’s
b) With a neat diagram, describe the operation of differential sense amplifier.
8) Describe:
i. Instruction level power analysis
ii. Voltage island
9) Describe channel routing problems
10) Write brief notes on:
i. Greedy channel router
ii. Hybrid HVH-VHV router