Assume we want to implement a function
F(X,Y,Z) = fm(0,1,2,3) + d(4,7) ("d" stands for "do not care").
Label necessary parts of the diagrams with X, X', Y, Y', Z, Z', 1, 0, F, etc...
a) Implement the function F using a minimum number of NAND gates; no additional gates may be used, but you can assume that all variables and their complements are available.
e) Implement the function F using only a 3-to-8 decoder and one additional gate with a minimum number of connections.