Consider a non-pipelined chip in which each instruction can be executed in 140 ns. A chip design company comes up with a new 4-stage pipelined design to execute instructions such that stage s1 takes 30 ns, s2 takes 30 ns, s3 takes 50 ns and s4 takes 30 ns of processing time.
a. Determine the time taken to execute the first instruction I1 in both the pipelined and non-pipelined cases. Also determine the time (i.e., how long it takes to execute them) at which the second instruction I2 and third instruction I3 finish execution in the pipelined and non-pipelined cases. Explain your answer.
b.Next, given the above conditions determine the maximum possible speedup in the throughput of the pipelined machine over the non-pipelined version. Explain your answer.