2 a machine has a 32-bit byte-addressable virtual address

Question

2. A machine has a 32-bit byte-addressable virtual address space. The page size is 4 KB. How many pages of virtual address space exist?
5. A computer has 16 pages of virtual address space but only four page frames. Initially, the memory is empty. A program references the virtual pages in the order
0, 7, 2, 7, 5, 8, 9, 2, 4
a. Which references cause a page fault with LRU?
b. Which references cause a page fault with FIFO?
7. In the paged systems discussed in the text, the page fault handler was part of the ISA level and thus was not present in any OSM level program's address space. In reality, the page fault handler also occupies pages, and might, under some circumstances (e.g., FIFO page replacement policy), itself be removed. What would happen if the page fault handler were not present when a page fault occurred? How could this be fixed?
15. Compare internal fragmentation to external fragmentation. What can be done to alleviate each?
17. In some ways, caching and paging are very similar. In both cases there are two levels of memory (the cache and main memory in the former and main memory and disk in the latter). In this chapter we looked at some of the arguments in favor of large disk pages and small disk pages. Do the same arguments hold for cache line sizes?

Answer 1

For the following computer based questions, provide solution to each part in a word paper in which you have to address all the requisite problems. Q1. A machine consists of a 32-bit byte-addressable virtual address space. The page size is 4 KB. Illustrate how many pages of virtual address space exist? Q2. A computer consists of 16 pages of virtual address space however only 4 page frames. Primarily, the memory is empty. A program references the virtual pages in order: 0, 7, 2, 7, 5, 8, 9, 2, 4. a) Name the references which cause a page fault by LRU? b) Name the references which cause a page fault by FIFO? Q3. In some manners, caching and paging are very identical. In both cases there are two levels of memory. In this, we are looking at some of the arguments in favor of big disk pages and small disk pages. Do similar arguments hold for cache line sizes?