Effect of Capacitive Loading:

The load capacitance seen by the output of inverter, in practice, is the input capacitance of loading gates and/or the capacitance of interconnecting wires as symbolized by the single load capacitance, C_L, in figure below. As charge should be changed on capacitance included, current is needed to do this and time is as well needed. This signifies that the switching transients are as well affected.

Figure: Capacitive Loading of the Bipolar Transistor Inverter

Transistor Turn-Off:

Supposing the transistor to be ideal itself, then whenever the input voltage is brought to 0V, the collector current is considered to finish to flow instantly. The output voltage, though, increases exponentially as the capacitance C_L, charges up to V_CC via R_C as shown in figure below.

Figure: Sequence of Events following Transistor Turn-Off

The following transistor turn-off, then, output voltage will follow the normal exponential growth curve and hence:

V_o(t) = V_CC (1 – e^-t/C_LR_C)

Whenever the output voltage reaches 10? of its final value at t = t₁₀

V_o(t) = 0.1 V_CC = V_CC (1 – e^-t10/C_LR_C)

Therefore,    

t₁₀ = C_L R_C ln (1/0.9)

Likewise, whenever the output voltage reaches 90% of its final value at t = t₉₀ we encompass:

V_o = 0.9 V_CC = V_CC (1 – e^-t90/C_LR_C)

And hence,

t₉₀ = C_L R_C ln (1/o.1)           

The 10% -to- 90% rise-time t_R is as follows:

t_R = t₉₀ – t₁₀ = C_L R_C ln (0.9/o.1)   

t_R = 2.2 C_L R_C

Usually, if R_C = 1 KΩ KCL = 10pF, then t_R = 22ns
               
It is a substantial amount of time in transistor switching terms. It should as well be remembered that in practice the capacitor charging will occur following the elimination of stored saturation charge from the base of transistor in practice. Therefore, the overall delay is the storage time, ts followed by the capacitor charging time that could reach 50ns whenever combined.

Transistor Turn-On:

The condition during turn-on of transistor is considerably distinct with capacitive loading than is the case with purely resistive loading. Transistor is another time taken to be ideal. Let consider figure below. Initially, transistor is off and the collector potential is at V_CC with C_L completely charged.

If the transistor is initially turned on, the charge stored by capacitor C_L, can’t be eliminated instantaneously and therefore the output voltage can’t change abruptly however remains at V_CC initially. However, the charged capacitor maintains a reverse bias on base-collector junction that permits the transistor to operate for a time in forward active mode.

In this mode,

i_C = β_F I_B = β_F (V_CC/R_B)
 
And a substantial portion of the collector current is supplied by capacitor, that consequently starts to discharge permitting the output voltage to decay exponentially (figure is as shown below). Ultimately, the output voltage drops to V_CESAT and the transistor saturates and hence the collector current now abruptly drops to its saturation value of I_CMAX ≈ V_CC/R_L.

Figure: Series of Events following Transistor Turn-On

By applying the Kirchhoff’s Current Law to node at collector gives:

By taking the inverse Laplace Transform:

V_o(t) = V_CC e^-t/C_LR_C + V_CC (1 - σ_u) (1 – e^-t/C_LR_C)
       
On multiplying the terms:

V_o(t) = V_CC e^-t/C_LR_C + V_CC - σ_u V_CC - V_CC e^-t/C_LR_C + σ_u V_CC e^-t/C_LR_C

And hence, finally in time domain:

V_o(t) = V_CC - σ_u V_CC (1 - e^-t/C_LR_C)

This exhibits that the output voltage starts at V_CC and travels towards a voltage equivalent to (1- σ_u) V_CC, with time constant C_LR_C. The expression is similar to that obtained for transistor turn-on in the case of unloaded inverter however has a distinct time constant. The times at which the output voltage reaches 90% and 10% of V_CC can be received in a similar way as for unloaded inverter as:

t₉₀ = C_LR_C ln [σ_u/(σ_u – 0.1)] and t₁₀ = C_LR_C ln [σ_u/(σ_u – 0.9)]

And hence the fall time tfCL = t₁₀ - t₉₀ is as follows:

t_fC_L = C_LR_C ln [(σ_u – 0.1)/(σ_u – 0.9)]

Usually, R_C = 1 KΩ KCL = 10pF, σ_u = 5 then, t_fC_L = 1.8 ns

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