Less propagation delay

You encompass two counters counting up to 16, built from negedge DFF, First circuit is synchronous and second is ripple (cascading), which circuit consist of a less propagation delay? Explain why?




The synchronous counter will encompass lesser delay as the input to each and every flop is readily available before the clock edge. While the cascade counter will take long time as the output of one flop is employed as clock to the other. Therefore the delay will be propagating. For Example: 16 state counter = 4 bit counter = 4 Flip flops Let 10ns be the delay of each flop The worst case delay of ripple counter = 10 * 4 = 40ns. The delay of synchronous counter is equal to 10ns only. (Delay of 1 flop)

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